With the development of display technology, the flat panel device, such as Liquid Crystal Display (LCD) possesses advantages of high image quality, power saving, thin body and wide application scope. Thus, it has been widely applied in various consumer electrical products, such as mobile phone, television, personal digital assistant, digital camera, notebook, laptop, and becomes the major display device.
Most of the liquid crystal displays on the present market are back light type liquid crystal displays, which comprise a liquid crystal display panel and a back light module. The working principle of the liquid crystal display panel is to locate liquid crystal molecules between two parallel glass substrates, and a plurality of vertical and horizontal tiny electrical wires are between the two glass substrates. The light of back light module is reflected to generate images by applying driving voltages to control whether the liquid crystal molecules to be changed directions.
Generally, the liquid crystal display panel comprises a CF (Color Filter) substrate, a TFT (Thin Film Transistor) array substrate, a LC (Liquid Crystal) sandwiched between the CF substrate and the TFT array substrate and sealant.
FIG. 1 is a diagram of a manufacture method of an array substrate according to prior art. The manufacture method of the array substrate comprises steps of:
step 1, providing a substrate 100, and sequentially forming a gate (not shown), a gate isolation layer 200, and active layer (not shown) and a source/a drain 30 on the substrate 100;
step 2, forming a passivation layer 400 on the source/the drain 30 and the gate isolation layer 200, and patterning the passivation layer 400 to obtain a first via 410 on the passivation layer 400;
step 3, forming a flat layer 500 on the passivation layer 400, and patterning the flat layer 500 to obtain a second via 510 in the first via 410; and then implementing anneal process to the flat layer 500;
step 4, forming a common electrode 600 on the flat layer 500;
step 5, forming a second passivation layer 700 on the common electrode 600, the flat layer 500, and patterning the second passivation layer 700 to obtain a third via 710 in the second via 510;
step 6, forming a pixel electrode 800 on the second passivation layer 700, and the pixel electrode 800 contacts with the source/the drain 30 through the third via 710.
In the aforesaid step 3 of the manufacture method of the array substrate, as implementing anneal process to the flat layer 500, the photoresist material of the flat layer 500 in the first via 410 will react with the metal material of the source/the drain 30, and generate the nonconducting complex 550, and then to block the conduction of the pixel electrode 800 and the source/the drain 30, which results in that the data signal (Data) cannot be transmitted to the pixel electrode 800. Accordingly, the performance of the array substrate can be significantly influenced.